In a sinusoidal PWM, signals are modulated sinusoidally, as shown in figure below. Note how duty-cycles of PWM changes in proportion to amplitudes of a reference sine wave.
A single phase sinusoidal PWM (ref)
For three phase sinusoidal PWM (SPWM) waves, simply generate PWMs using three such modulating sine waves 120° from each other, as shown below:
A three-phase Sinusoidal PWM (ref)
How to generate PWMs -
(A) Analog approach
The SPWM (three phase or a single) can be generated by continually comparing a reference sine wave (three phase or a single) with a triangular wave using an opamp comparator.
(B) Digital approach -
Digitally (using FPGAs, microcontrollers or dedicated ICs), one approach would be to calculate signals.
However, a much preferred (and a usual) approach makes use of predefined look-up tables of signal pulse widths.
Lets use an 8-bit for our look up tables.
First, let us quantize the amplitude of the sinusoidal wave in 8 bits. The negative peak of the sine wave will be zero and the positive peak as 255 as given by the following equation.
PWMduty-cycle=
127*sin f+128,
0 £ f £
2p .
Above equation is for a single phase. For three phase, equations will be:
Phase R PWMduty-cycle=127*sin f+128
Phase Y PWMduty-cycle=127*sin
(f+120°) +128
Phase
B PWMduty-cycle=127*sin (f+240°) +128
However, "f" has to be digitized too. Using 8-bits, f8-bit=
(k/256) x 2p,
where 0 £ k £
255.
This will result in: (for a single phase)
PWMduty-cycle= 127*sin {(k/256) x
2p}
+ 128, 0 £ k £
255
Above final equation will give us a 8-bit value for PWMs that we can store in a look-up table 256 long (each storing a byte). Note, the equation will result in floating numbers which needs to rounded up or down as appropriate.
A Verilog snippet code below shows the data in the look-up table: (best viewed in Chrome browser)
//note 256 locations each storing 8-bit long data (PWM) //each location represents an angle location/time
case(addr) //angle: data=PWM; 8'd00: data=8'd128; 8'd01: data=8'd131; 8'd02: data=8'd134; .... 8'd254: data=8'd122; 8'd255: data=8'd125; endcase
(We can create similar table using C/C++ or any other language).
The table is for a single phase. For three phase, we may be inclined to create three different look-up tables, one for each phase. However, such an approach will require more memory space. Rather what we should do is to read from three locations (each 120° apart).In other words, if a duty-cycle value for the first phase is read at 0° (0th place) for the first phase, values from 120° (85th place) and 240° (171th place) are read for the second and the third phase,
respectively from the look-up table.
How to establishing the desired
sinusoidal frequency?
It is Simple. The rate of reading the duty-cycles from the look-up table will give us the desired sinusoidal frequency - simply read from the table at the desired frequency rate.
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