ECL is based on current mode logic and transistors don’t need to go into saturation mode which means the propagation delay in this family is best compared to any other family compared. But corresponding logic swing is much less in ECL than for other family. Also, correspondingly power consumption was high which was tradeoff in this logic family. But because of emitter follower output stage at ECL, there is a good fanout in this logic.
Just like other ICs (previous blogs), lets measure the VOL and VOH of the MC10102P quad NOR gate as well as to measure its propagation times by forming a ring oscillator.
Circuit setup to measure the VTC parameters
This is what I got,
|
As
Measured
|
From
datasheet
|
VOH
|
-
0.89 V
|
-
0.81 V
|
VOL
|
-
1.62 V
|
-
1.65 V
|
Next, I went to measure the average
propagation delay of the IC using ring oscillator technique:
Circuit setup for the ring oscillator
I got the following result:
which gives me the following result:
foscillation
(MHz)
|
Time
period, T=1/ foscillation
|
Average
propagation delay, tp=T/ (2*3)
|
99.01
|
10.1
nS
|
1.68
nS
|
|
From
measurement
|
From
datasheet
|
tP
|
1.68
nS
|
2
nS
|
Of all ICs tested so far, the ECL shows the least propagation delay.
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