Measuring propagation delay of a logic IC

I wanted to measure the propagation delay through a single SN7402 TTL NOR gate. For this, I used the same conditions as specified by the manufacturer so as to make comparison with regards to the manufacturer’s specifications. The circuit is shown below:

At its input, I connected a function generator as a 5Vpk step function. The signals were measured both at the input and the output. I got the following result:

For ON to OFF transition at the output of the NOR:

                                     

For OFF to ON transition at the output of the NOR:

This would give me the results as:

Propagation delays as measured

td (nS)	tf (nS)	ts (nS)	tr (nS)	tPHL=td +tf/2 (nS)	tPLH=ts +tr/2 (nS)
6	12.4	15	28	12.2	29

I repeated the experiment with the CL removed, I got the following results:

tPLH	3.2 nS
tPHL	10 nS

Note: For the second case, t_PLH and t_PHL were determined by measuring midpoints of transition between input and output waveforms.

Now, comparing with the datasheet, we have:

	As Measured	From Datasheet
	With CL
tPLH	12.2 nS	8 – 15 nS
tPHL	29 nS	12 – 22 nS
	Without CL
tPLH	3.2 nS	8 – 15 nS
tPHL	10 nS	12 – 22 nS

With the use of load capacitance C_L, the measured values for t_PLH and t_PHL were more than the range in the datasheet. Removing the load capacitor improved the result (and also well within the datasheet). I believe the previous measurement was likely affected by the experimental setup, mainly the input capacitance of the oscilloscope. Besides, parasitic capacitances due to other setups like between leads, breadboard connections would have added up with that of the load effecting the total propagation delay.